In the previous exercise, we created the following OPCODE example:

000001 01001 10111 0001101001010110

We now know that the first part of the bit sequence is the OPCODE, but what about the rest? The rest of the message is the operands, memory locations, and additional functions that the processor will perform.

We’ll take the simple multiplication of 5 * 6 to visualize two different ISA styles, CISC and RISC, before we start to decipher the code beyond the OPCODE.

CISC machine code is so long because the goal of CISC is to reduce the total number of instructions that are fed into the hardware. It may take multiple cycles of hardware to process the instruction, but it will still get done. The original purpose was to reduce the required memory for a program because memory was very expensive and consumed lots of space:

Machine Code: 001010010001001010100101010100101000101010101001111010010010010100101010001010010100010100001101000111101101011010101011101001 Readable Code: MUL 5 * 6

RISC on the other hand, would take a CISC instruction and break it up into several very simple tasks that each require one cycle to complete. This may require more operations, but allows for multiple sequencing, or pipelining, of tasks to make up for it. Essentially, since all tasks take the same amount of time to complete, they can be executed more efficiently like so:

Machine Code: 00101001101001001001000100011100 Readable Code: LOAD 5 from REG 1 Machine Code: 00101001101001111001000100011100 Readable Code: LOAD 6 from REG 2 Machine Code: 00011000101001010101111000110001 Readable Code: MUL 5 * 6 Machine Code: 00111001101010100000111101010011 Readable Code: STORE 30 in REG 3

As we begin breaking up the remaining bits in our machine code, we will use a specific type of RISC instruction architecture called MIPS, or Microprocessor without Interlocked Pipeline Stages. It has a fixed 32-bit instruction length, limited instructions, and is used by most post-secondary educators for its ease of understanding. Here is a link to the documentation if you want to learn more about the MIPS architecture.


Take a look at some of the MIPS instructions in the console. When you are finished, what characteristics make this a great example of a RISC ISA?

Possible Answers
  • Fixed length
  • Limited number of possible instructions
  • Requires only simple hardware to process
  • Small instruction set require less power and hardware to process

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